Masakazu Shimaya: search on Z-Library

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1

Interface-trap generation at ultrathin SiO2 (4–6 nm)-Si interfaces during negative-bias temperature aging

Ogawa, Shigeo, Shimaya, Masakazu, Shiono, Noboru

Journal:

Journal of Applied Physics

Year:

1995

Language:

english

File:

PDF, 1.70 MB

english, 1995

2

The influence of stud bumping stress on device degradation in scaled MOSFETs

Nobuhiro Shimoyama, Katsuyuki Machida, Masakazu Shimaya, Hiroshi Koizumi, Hakaru Kyuragi

Journal:

Microelectronics Reliability

Year:

2000

Language:

english

File:

PDF, 1.31 MB

english, 2000

3

Suppressing the parasitic bipolar action of SOI-MOSFETs by using back-side bias-temperature treatment

Hiroshi Koizumi, Masakazu Shimaya, Toshiaki Tsuchiya

Journal:

Microelectronics Reliability

Year:

1997

Language:

english

File:

PDF, 271 KB

english, 1997

4

Ionizing Radiation Effects in MOS Capacitors with Very Thin Gate Oxides

Shiono, Noboru, Shimaya, Masakazu, Sano, Koichi

Journal:

Japanese Journal of Applied Physics

Year:

1983

Language:

english

File:

PDF, 478 KB

english, 1983

5

Impact of Negative-Bias Temperature Instability on the Lifetime of Single-Gate CMOS Structures with Ultrathin (4–6 nm) Gate Oxides

Ogawa, Shigeo, Shimaya, Masakazu, Shiono, Noboru

Journal:

Japanese Journal of Applied Physics

Year:

1996

Language:

english

File:

PDF, 297 KB

english, 1996

6

Reduction of Electron-Beam-Induced Damage in MOS Devices Using Three-Layer Resist with Heavy Metal Interlayer

Shimaya, Masakazu

Journal:

Journal of The Electrochemical Society

Year:

1984

Language:

english

File:

PDF, 545 KB

english, 1984

7

Electron Beam Induced Damage in Poly-Si Gate MOS Structures and Its Effect on Long-Term Stability

Shimaya, Masakazu

Journal:

Journal of The Electrochemical Society

Year:

1983

Language:

english

File:

PDF, 745 KB

english, 1983

8

Stress-Induced Device Degradation Due to Die-Attachment Process after Area Bump Formation

Shimoyama, Nobuhiro, Machida, Katsuyuki, Shimaya, Masakazu, Kyuragi, Hakaru

Journal:

Japanese Journal of Applied Physics

Year:

1999

Language:

english

File:

PDF, 462 KB

english, 1999

9

Charge character of interface traps at the Si-SiO2 interface

Shiono, Noboru, Shimaya, Masakazu, Nakajima, Osaake

Journal:

Applied Physics Letters

Year:

1986

Language:

english

File:

PDF, 469 KB

english, 1986

10

A new hot-carrier induced degradation mode under low gate and drain bias stresses in n-channel MOSFETs

Masakazu Shimaya, Shigeo Ogawa, Noboru Shiono

Journal:

Microelectronic Engineering

Year:

1993

Language:

english

File:

PDF, 349 KB

english, 1993

11

Influence of polysilicon gate formation conditions on thin gate oxide (4–6 nm) dielectric and charging properties

Itsumi, Manabu, Shiono, Noboru, Shimaya, Masakazu

Journal:

Journal of Applied Physics

Year:

1993

Language:

english

File:

PDF, 700 KB

english, 1993

12

SiSiO2 interface state generation at the surface potential of 0.4 and 0.7 eV

Manabu Itsumi, Noboru Shiono, Masakazu Shimaya

Journal:

Microelectronic Engineering

Year:

1995

Language:

english

File:

PDF, 241 KB

english, 1995

13

Electron Trapping Induced by High-Energy Ionizing Radiation in SiO 2

Shimaya, Masakazu, Shiono, Noboru

Journal:

Japanese Journal of Applied Physics

Year:

1985

Language:

english

File:

PDF, 898 KB

english, 1985

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